Comparison between Spartan-3E and Virtex-6 Technologies on FPGA for UART Transmission

This paper presents the hardware implementation of high speed (Universal Asynchronous Receiver/Transmitter) UART using (Field Programmable Gate Array) FPGA. UART is an integrated circuit containing a transmitter (parallel to serial converter) and a receiver (serial to parallel converter) each clocked separately. It transmit 9600 to 34800 bps for transmitting data bit. A high speed UART using 90nm and 40nm technologies has been designed by using FPGA’s Spartan 3E and Virtex 6 synthesized on the xilinx ISE 12.4i in VHDL language. By comparing these two technologies on the basis of number of slices, look up tables, GCLK’s, slice flip-flops and maximum frequency, it was seen that 40nm technology consumes less area and is 3 times faster than 90nm technology.